Validation plans
A validation plan is a detailed document that describes the process, criteria, and activities necessary to ensure that a product meets the established requirements and specifications. All types of tests can be performed in our laboratory using a climate chamber to expose products to specific pressure and temperature environments.
Process validation with SIR
Surface Insulation Resistance (SIR) testing is one of the methods used in the process validation of printed circuit boards (PCBAs). This method helps ensure the reliability and performance of PCBAs by evaluating their resistance to common failure modes such as conductive anodic filament (CAF) formation, dentrites and electrochemical migration.
What is SIR Testing?
SIR testing measures the electrical resistance between conductors on a PCBA under specific environmental conditions, typically involving elevated temperature and humidity. The goal is to assess the insulation properties of the PCBA materials and the effectiveness of the manufacturing process in preventing conductive paths that could lead to failures.
Practical example
Objective: Solve the problem of dendrites in circuits with conformal coating.
Problem: Detection of an incorrect curing process resulting in adherence problems.
Testing method used:
Step 1: ECM Research with two methods:
- SEM/EDX
- C3
Step 2: Study of the process through SIR.
Step 3: Modification of the curing process.
Step 4: Validation of the new process through SIR.
